1. Field of the Invention
The present invention is applied to a dynamic random access memory (referred to as a DRAM hereinafter) and specifically relates to a semiconductor integrated circuit including a booster circuit for generating a boost voltage which is higher than an external power supply voltage.
2. Description of the Related Art
Since a currently-used DRAM requires voltages of different levels in an integrated circuit, a plurality of voltage generator circuits are arranged in the integrated circuit, and a desired voltage is generated from each of the voltage generator circuits. These circuits comprise a substrate voltage generator circuit for generating a substrate potential and a well potential, an internal power supply voltage generator circuit for generating an internal power supply voltage of the memory, and a reference voltage generator circuit for generating a reference voltage serving as an internal reference potential. Since the plural voltage generator circuits are provided in the integrated circuit, it can be a single external power supply voltage that is applied from outside the integrated circuit.
The voltage generator circuits are classified into booster circuits and pull-down circuits according to their functions. The voltage generator circuits are employed in order to improve an operation margin of the integrated circuit for the external power supply voltage and secure the reliability of the integrated circuit. Recently the external power supply voltage tends to decrease and thus various types of DRAMs loaded with a booster circuit as a voltage generator circuit are proposed. Such a DRAM is disclosed in, for example, Y. NAKAGOME et al., 1990 Symposium on VLSI Circuit, pp. 17-18. In a DRAM mounted with a booster circuit, an output voltage of the booster circuit is applied to a word line driving circuit for driving word lines and an equalizing circuit for charging a pair of bit lines to a predetermined potential. In a shared sense amplification system, the output voltage is applied to a connecting circuit for connecting a sense amplifier and a pair of bit lines, and the like.
The operating efficiency of the booster circuit is not generally too high. Therefore, when the memory increases in capacity and so do the word line driving circuit, equalizing circuit, and connecting circuit, which serve as loads of the booster circuit, the application of boost voltage to these loads increases the burden of the booster circuit.
It can thus be considered to enhance the current supply capability of the booster circuit; however, it is not advisable to do so since the chip size and current consumption are increased. It can also be considered not to use a booster circuit. In this case, however, when the external power supply voltage is lowered, it is likely that it will be difficult to secure the reliability of the integrated circuit because of long access time and low sense margin.